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  1. RISC-V Specification Lifecycle
  2. RVS-1017

Fast Interrupts (CLIC)

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    • FastInt
    • No
    • ISA
    • Smclic, Ssclic, Suclic, Smclicshv, Smclicconfig
    • Review Requested
    • Not Started
    • 3

      A low-latency, vectored, priority-based, preemptive interrupt scheme for interrupts directed to a single hart, compatible with the existing RISC-V standards.

      Author: Dan Smathers

      Legacy documents:

        1.
        		 [Inception] - Infrastructure Setup Request Specification Acceptance Criteria Done Unassigned 10/Jul/23 0
        2.
        		 [Plan] - Develop Specification Plan Planning Acceptance Criteria Done Unassigned 17/Jul/23 2
        3.
        		 [Plan] - Governing Committee Approval Approval Approval Not Required Jeff Scheel 10/Jul/23 1
        4.
        		 [Plan] - Schedule Plan Presentation to Chairs Specification Acceptance Criteria Not Required Jeff Scheel 10/Jul/23 1
        5.
        		 [Plan] - Present Plan to Chairs Specification Acceptance Criteria Not Required Unassigned 10/Jul/23 1
        6.
        		 [Plan] - Chairs Approval Approval Approval Not Required Jeff Scheel 10/Jul/23 0
        7.
        		 [Plan] - Notify TSC Specification Acceptance Criteria Not Required Unassigned 10/Jul/23 0
        8.
        		 [Development] - Develop Specification Development Acceptance Criteria Done Unassigned 07/Apr/24 0
        9.
        		 [Development] - Internal Review Development Acceptance Criteria Not Required Unassigned 23/Mar/24 0
        10.
        		 [Development] - ARC Review (consultative activity) ARC Review AR Review Not Required Rafael Sene 23/Mar/24 0
        11.
        		 [Development] - Governing Committee Specification Stabilization Approval (Informal) Approval Approval Not Required Rafael Sene 15/Mar/24 0
        12.
        		 [Freeze] - Complete Documentation of New Instructions, State Changes, and ISA Alterations Freeze Acceptance Criteria Done Rafael Sene 31/Dec/23 0
        13.
        		 [Freeze] - Develop Opcode Support Freeze Acceptance Criteria Done Rafael Sene 31/Dec/23 2
        14.
        		 [Freeze] - Implement Simulator Support Freeze Acceptance Criteria Done Unassigned 31/Dec/23 1
        15.
        		 [Freeze] - Implement psABI Freeze Acceptance Criteria Not Required to Freeze Unassigned 31/Dec/23 0
        16.
        		 [Freeze] - Develop Support for GCC Freeze Acceptance Criteria Not Required to Freeze Unassigned 31/Dec/23 1
        17.
        		 [Freeze] - Develop Support for LLVM Freeze Acceptance Criteria Not Required to Freeze Unassigned 31/Dec/23 0
        18.
        		 [Freeze] - Develop RISC-V Tests Freeze Acceptance Criteria Done Unassigned 31/Dec/23 1
        19.
        		 [Freeze] - Perform Input Testing Freeze Acceptance Criteria Done Unassigned 31/Dec/23 1
        20.
        		 [Freeze] - Add Support into the Sail Golden Model Freeze Acceptance Criteria Done Unassigned 31/Dec/23 1
        21.
        		 [Freeze] - Create Proof of Concept Freeze Acceptance Criteria Done Unassigned 31/Dec/23 1
        22.
        		 [Freeze] - ARC Review (required) ARC Review Under AR Review Rafael Sene 31/Dec/23 0
        23.
        		 [Freeze] - Ensure Compliance with RISC-V Specification Policies Approval Not Started Jeff Scheel 31/Dec/23 0
        24.
        		 [Freeze] - Request Signoffs from Committee Chair Approval Not Started Jeff Scheel 31/Dec/23 0
        25.
        		 [Freeze] - Request Signoff from RISC-V CTO Approval Not Started Jeff Scheel 31/Dec/23 0

            Unassigned Unassigned
            jscheel Jeff Scheel
            Daniel Smathers Daniel Smathers
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              Created:
              Updated: