Support LLVM (optimizations not required)

Developing support for the LLVM generally means creating a new backend (or porting an existing one) for a particular processor architecture or instruction set.

The backend needs to implement the translation from LLVM's intermediate representation to the machine code of the new architecture. This includes:

• Instruction Selection: Choosing the appropriate target instructions for each operation in the intermediate code.
• Register Allocation: Mapping the values in the intermediate code to the registers of the target machine.
• Instruction Scheduling: Determining the order of instructions to maximize performance.
• Calling Conventions: Implementing the rules for function calls, including passing arguments and returning results.