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  1. RISC-V Specification Lifecycle
  2. RVS-1019

Svadu - Hardware Updating of PTE A/D Bits

    • Yes
    • ISA
    • Svadu
    • Ratification-Ready Approved
    • Completed
    • Approved
    • Completed
    • Completed
    • Completed
    • Approved
    • 0

      The Svadu extension modifies the existing verbiage in the Priv Spec around A/D bits in PTEs where the hardware modifies those fields. It further adds control fields to the menvcfg and henvcfg csrs, each named HADE that determine the behavior of A/D bit updates.

      Spec author: Aaron Durbin, Ved Shanbhogue

      Legacy documents:

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            Unassigned Unassigned
            jscheel Jeff Scheel
            Vedvyas Shanbhogue Vedvyas Shanbhogue
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