The RVM-CSI SIG drives the strategy and coordinates the development of RISC-V's Common Software Interface (CSI) for RISC-V Microcontrollers.

RVM-CSI is to provide a source-level portability layer providing a simplified transition path between different microcontrollers based on RISC-V. It may define programming interfaces in multiple programming languages, derived from a single source of truth which determines common function and macro names and descriptions across all implemented languages. The RVM-CSI SIG drives the strategy and coordinates the development of the entire solution and ensures integration with other RISC-V initiatives, such as Toolchains, Performance Analysis, and Unified Discovery.

The group has governance for the RVM-CSI specification and compatibility test-suite, and drives the outreach to related upstream projects.

The RVM-CSI SIG covers the following activities:

• Provides gap analysis, strategy development, requirements analysis, and outreach for RVM-CSI on behalf of the Software HC
• Develops the roadmap and proposes the creation of TGs for the development of the RVM-CSI core specification, extensions, and compatibility test-suites
• Drives the outreach to external (Open-Source, Academic, and Commercial) projects and actively recruits partners to develop RVM-CSI
• Works with membership to establish guidelines and documentation
• Provides RVM-CSI expertise to other specification effort including early review of requirements and gap-analysis.

Apr 30 2024, SIG was set to hibernation: https://lists.riscv.org/g/tech-announce/message/429

Leadership History:

Period	Chair	Vice-chair
2023-2024	Chris Owen - Chris.Owen@imgtec.com	Vincent Cui - cxx194832@alibaba-inc.com